The 8-digit timer / counter can be used as the counter with the permission, and for exact applications with low coefficient of division of clock frequency. Higher coefficients of division can be for slow functions or measurement of time intervals between rare events.
For start of the mode of the lowered energy consumption has to be (register MCUCR SE bit, and the SLEEP team has to be executed. If in the time spent in the mode of the lowered consumption one of the allowed interruptions, the processor starts working, executes the subprogramme of processing of interruption and continues implementation of the program from the team following SLEEP. Contents of the register file and memory of input-output do not change. If in the mode of the lowered there is a dumping, the processor begins implementation of the program with a dumping.
The 16-digit timer / counter 1 can be used as the counter with high resolution, and for exact applications with a low of division of clock frequency. Higher coefficients of division can be used for slow functions or measurement of time intervals between rare events.
The timer/counter 1 supports function of coincidence using coincidence of OCR1A as a source for comparison with counter contents. Function of coincidence supports cleaning of the counter and a of an exit on coincidence.
The timer/counter is realized as the accruing counter with possibility of reading and record. At record of the timer/counter if there are impulses, the timer/counter continues the account in the clock cycle following record operation.
The minimum time of reaction to any of the interruptions provided in a - 4 periods of clock frequency. After four cycles the program vector processing this interruption. For these 4 cycles the program counter registers in a stack, the index of a stack decreases by the Program vector represents relative transition to the subprogramme of service of interruption and this transition 2 periods of clock frequency. If interruption happens during a of the team lasting some cycles before a call of interruption performance of this team comes to the end. The exit from the program of service of interruption takes 4 periods of frequency. For these 4 periods from a stack the program counter is restored. After an exit the processor always carries out from interruption still I will dress team before serving any postponed interruption. Let's notice that the register of a condition of SREG hardware is not processed by the processor, both by a call of subprogrammes, and at service of. If the program demands preservation of SREG, it has to by the program of the user. For the interruptions included by static events (e.g. coincidence of value of the counter/timer 1 to the register of coincidence) the flag of interruption is cocked at emergence of an event. If the flag of interruption is cleared and there is an interruption emergence condition, the flag will not be set, there will be no following event yet.